This invention relates to an integrated circuit device including a transistor amplifier stage with a biasing circuit arrangement. A particular application of the invention in its preferred form is as a low voltage radio frequency (RF) amplifier for providing differential outputs to a mixer stage.
British Patent Application No. GB2331418A discloses an integrated circuit device having a low voltage single-ended to differential amplifier stage which forms a driver stage for an RF mixer stage having differential signal inputs. The amplifier stage has first and second bipolar transistors each of which is connected to the single-ended input, one connected as a common-base amplifier, and the other as a common-emitter amplifier. The differential outputs to the mixer are produced on the collector electrodes of the transistors. Both transistors have their base-emitter junctions forward-biased using a biasing circuit arrangement comprising a constant current source and a third transistor which is connected to the base electrodes of the first and second transistors via respective series resistances. Inductances in the emitter circuits of the first and second transistors provide a measure of inductive degeneration and allow the emitter electrodes to operate at a potential very close to that of the associated supply rail, maximizing the proportion of the supply voltage which is available to the rest of the circuit. The amplifier stage requires connection of an external choke between the input and ground terminals of the device to provide a DC path to ground for the emitter electrode of the common-base amplifier.
This known device has a number of disadvantages relating to the DC biasing of the amplifier stage. One difficulty is that there is a DC voltage drop associated with the DC current path formed by the integrated circuit bond wires between the device chip and the integrated circuit device terminals for the single-ended input, as well as associated printed circuit board (PCB) tracks and the external choke referred to above, when present. This means that the biasing of the first and second transistors is partly dependent on device manufacturing and PCB implementation, variables.
Another disadvantage is one associated with the need to maintain a low reference bias current in order to minimize power consumption, Typically, the biasing circuit arrangement is implemented as a current mirror. On-chip spiral inductors in the emitter circuits of the first and second transistors often have enough series resistance to the extent that they need to be taken into account in the current mirror reference diode. The desire to keep the reference current low in these circumstances necessitates a large silicon area for the biasing circuit arrangement.
If the spread of the mixer stage operating current is to be minimized, it is desirable to have the reference bias current generated by a current reference circuit that uses a low-tolerance external resistor to determine the reference current. This generally means that a relatively low current reference cannot easily be used as a reference current input to a current mirror biasing an RF amplifier stage without noise and silicon area penalties.